Volume-3 Issue-2, September 2023 – Indian Journal of VLSI Design (IJVLSID) https://www.ijvlsi.latticescipub.com Exploring Innovation | ISSN: 2582-8843 (Online) | A Periodical Journal | Reg. No.: C/1383209 | Published by Lattice Science Publication (LSP) Wed, 15 Nov 2023 08:01:00 +0000 en-US hourly 1 https://wordpress.org/?v=7.0 https://www.ijvlsi.latticescipub.com/wp-content/uploads/2021/02/cropped-IJVLSID-WFS-1-32x32.png Volume-3 Issue-2, September 2023 – Indian Journal of VLSI Design (IJVLSID) https://www.ijvlsi.latticescipub.com 32 32 B1219093223 https://www.ijvlsi.latticescipub.com/portfolio-item/b1219093223/ Wed, 15 Nov 2023 07:44:59 +0000 https://www.ijvlsi.latticescipub.com/?post_type=portfolio&p=1062 The Indian Journal of VLSI Design (IJVLSID) has ISSN 2582-8843 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of VLSI Design that covers VLSI Circuits and Design, Biological Computing, Computer-Aided Design (CAD), Fault-Tolerance, Emerging Technologies, Low Power and Power Aware Design, Molecular Computing, Nano Electronics Computing, Post-CMOS VLSI, Reliability, Testing, VLSI Applications (Communications, Video, Security, Sensor Networks), Quantum Computing and Wireless Communications. #VLSI Circuits and Design #Biological Computing #Computer-Aided Design (CAD) #Fault-Tolerance #Emerging Technologies #Low Power and Power Aware Design #Molecular Computing #Nano Electronics Computing #Post-CMOS VLSI #Reliability #Testing #VLSI Applications (Communications, Video, Security, Sensor Networks) #Quantum Computing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons

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]]> The Indian Journal of VLSI Design (IJVLSID) has ISSN 2582-8843 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of VLSI Design that covers VLSI Circuits and Design, Biological Computing, Computer-Aided Design (CAD), Fault-Tolerance, Emerging Technologies, Low Power and Power Aware Design, Molecular Computing, Nano Electronics Computing, Post-CMOS VLSI, Reliability, Testing, VLSI Applications (Communications, Video, Security, Sensor Networks), Quantum Computing and Wireless Communications. #VLSI Circuits and Design #Biological Computing #Computer-Aided Design (CAD) #Fault-Tolerance #Emerging Technologies #Low Power and Power Aware Design #Molecular Computing #Nano Electronics Computing #Post-CMOS VLSI #Reliability #Testing #VLSI Applications (Communications, Video, Security, Sensor Networks) #Quantum Computing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons

CVM: Crossbar-based circuit Verification through ModelingCROSSMARK Color horizontal
Rajesh Kumar Datta

Rajesh Kumar Datta, Department of Electrical and Computer Engineering, University of Texas at Dallas, Dallas, USA.

Manuscript received on 13 May 2023 | Revised Manuscript received on 23 May 2023 | Manuscript Accepted on 15 September 2023 | Manuscript published on 30 September 2023 | PP: 1-4 | Volume-3 Issue-2, September 2023 | Retrieval Number: 100.1/ijvlsid.B1219093223 | DOI: 10.54105/ijvlsid.B1219.093223

Open Access | Editorial and Publishing Policies | Cite | Zenodo | Indexing and Abstracting
© The Authors. Published by Lattice Science Publication (LSP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

On 15 November 2023, the Indian Journal of VLSI Design (IJVLSID) Withdrawn the article “CVM: Crossbar-based circuit Verification through Modeling” from Volume-3 Issue-2 September 2023 due to authors request for reform of his work.

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]]> B1222093223 https://www.ijvlsi.latticescipub.com/portfolio-item/b1222093223/ Fri, 29 Sep 2023 09:58:10 +0000 https://www.ijvlsi.latticescipub.com/?post_type=portfolio&p=1045 The Indian Journal of VLSI Design (IJVLSID) has ISSN 2582-8843 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of VLSI Design that covers VLSI Circuits and Design, Biological Computing, Computer-Aided Design (CAD), Fault-Tolerance, Emerging Technologies, Low Power and Power Aware Design, Molecular Computing, Nano Electronics Computing, Post-CMOS VLSI, Reliability, Testing, VLSI Applications (Communications, Video, Security, Sensor Networks), Quantum Computing and Wireless Communications. #VLSI Circuits and Design #Biological Computing #Computer-Aided Design (CAD) #Fault-Tolerance #Emerging Technologies #Low Power and Power Aware Design #Molecular Computing #Nano Electronics Computing #Post-CMOS VLSI #Reliability #Testing #VLSI Applications (Communications, Video, Security, Sensor Networks) #Quantum Computing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons

The post B1222093223 appeared first on Indian Journal of VLSI Design (IJVLSID).

]]> The Indian Journal of VLSI Design (IJVLSID) has ISSN 2582-8843 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of VLSI Design that covers VLSI Circuits and Design, Biological Computing, Computer-Aided Design (CAD), Fault-Tolerance, Emerging Technologies, Low Power and Power Aware Design, Molecular Computing, Nano Electronics Computing, Post-CMOS VLSI, Reliability, Testing, VLSI Applications (Communications, Video, Security, Sensor Networks), Quantum Computing and Wireless Communications. #VLSI Circuits and Design #Biological Computing #Computer-Aided Design (CAD) #Fault-Tolerance #Emerging Technologies #Low Power and Power Aware Design #Molecular Computing #Nano Electronics Computing #Post-CMOS VLSI #Reliability #Testing #VLSI Applications (Communications, Video, Security, Sensor Networks) #Quantum Computing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons

A Pass Transistor based Multifunction Gate DesignCROSSMARK Color horizontal
Rajesh Kumar Datta

Rajesh Kumar Datta, Department of Electrical and Computer Engineering, University of Texas at Dallas, Dallas, USA.

Manuscript received on 14 July 2023 | Revised Manuscript received on 22 July 2023 | Manuscript Accepted on 15 September 2023 | Manuscript published on 30 September 2023 | PP: 5-8 | Volume-3 Issue-2, September 2023 | Retrieval Number: 100.1/ijvlsid.B1222093223 | DOI: 10.54105/ijvlsid.B1222.093223

Open Access | Editorial and Publishing Policies | Cite | Zenodo | Indexing and Abstracting
© The Authors. Published by Lattice Science Publication (LSP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: This study introduces a gate design that uses pass transistor switches and enables the implementation of all necessary logic gates with a single structure. This gate design can be used for efficient circuit resizing and creating secure obfuscated circuits. This work also presents simulation results that demonstrate the effectiveness of the gate in performing various logic gate operations.

Keywords: Logic Gate, UVM, Universal Logic Gate, Pass Transistors
Scope of the Article: VLSI Circuits and Design

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